See 11/07 profile.

3Plus1 Technology was formed in 2003 to develop “an ultra low power, scalable, processor family that is highly efficient in running concurrent communications and multimedia applications.” The company has been self-financed by its founders since its inception and has generated some revenue from research consulting in the field processor architectures. Although upwards of $20 million is required to bring a chip to market these days, 3Plus1 hopes that customer contracts will fulfill its future capital requirements. The company has roughly 20 employees.

3Plus1 has designed a heterogeneous multiprocessor architecture conceived from the ground up to run next-generation handheld systems. The architecture has been used as the basis for a series of CoolProcessor devices aimed at addressing the low-power needs of mobile-system manufacturers. The company is addressing the needs of the 600-million-plus mobile handset, camera and PDA market.

According to Yrjo Neuvo, Nokia SVP and Senior Technology Advisor to 3Plus1, “the need for processing simultaneous multimedia and communications applications is leading to excessive power dissipation and increasing costs of next-generation mobile systems.” Faced with today’s solutions, which dissipate around 3000mW, next-generation mobile handsets combining additional voice, video and data applications need to have a power budget of no more than 2000mW, given realistic battery capacities.

“Architectural solutions that exploit the heterogeneous concurrency of the applications are, in the long run, the only viable solution,” said Jan Rabaey, Professor at UC Berkeley and Director of the Berkeley Wireless Research Center and the MARCO Gigascale System Research Center. Previous attempts to create heterogeneous multiprocessor architectures have mostly failed for a variety of reasons, most importantly the lack of a smooth integration between the hardware and software layers, as well as the clear match between the applications and the hardware computational modules.

3Plus1 argues that its solution overcomes these problems. 3Plus1 has created an architecture specifically designed for low-power, concurrent execution of specific applications, including MPEG 2/4, H.263/4, JPEG/2000, 802.11 a/b/g, 802.16 Bluetooth, GSM/GPRS/EDGE, CDMA 2000/WCDMA, MP3 and GPS, in various combinations. This has been accomplished in a sub-100mw processor when implemented in a standard 130nm low-power CMOS process.

3Plus1 has developed approximately 20 patentable technologies that are in process of disclosure for registration. These technologies represent fundamental advances to the problem of architectural design for low power implementation of communication and multimedia applications.

The development of a highly optimized programmable processor for a target set of applications demands continuous adjustment of tools and hardware design, even late into the development cycle, based on feedback from the application programming results. The CoolProcessor technology has been developed in record time, based on an internally developed, automated methodology, capable of generating RTL, simulation, analysis and verification tools automatically from a high-level relational database. Development partners include ARM for the OS and I/O control processor, Sonics for the silicon backplane, CoWare for system-level simulation and Hellosoft for communications application software.

The scalable CoolProcessor family comprises six members, all upwardly code compatible with a single programming model. Development of software applications follows a standard DSP tool flow and the company is currently delivering its initial applications development software and modeling tools to early evaluation partners.

The 3P3200, the first member of the CoolProcessor family, is capable of running combinations of MPEG, JPEG, GSM and 802.11 concurrently. The device is planned for release in Q2’05 and is priced at $8 in quantities of 10K pieces. The 3P5220 will follow the 3P3200 by roughly 6 months. A foundry partner will be selected in several months.

Allan Cox, Co-founder, President and CEO (previously COO at Quicksilver, GM and SVP for the System LSI business for Toshiba Americas and CTO for LG Semicon)

Dr. Amir Zarkesh, Co-founder & EVP of Engineering (previously Director of Hardware at Quicksilver)

Dr. Reza Sadri, Co-founder & Chief Software Architect (currently CTO of Procom Technology)

Amit Ramchandran, Co-founder & Chief Hardware Architect (previously the architect and logic designer of an adaptive processor at Quicksilver)