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ICT (Integrated Circuit Technology) -- Internet Appliance IP Cores and Compilers  
 
Founded:
Status: Defunct
Source: Semiconductor Times, 5/00
www.ictpld.com
2123 Ringwood Ave.
San Jose, CA 95131
Tel: 408/434-0678
Fax: 408/434-0688

Although 18 years old, ICT, is going through a metamorphosis since being bought out by the current management team in October 1998 to pursue new product plans. The company now has approx. 35 employees.

ICT offers a range of PEEL™ products based on the company’s proprietary CMOS EEPROM technology. PEEL Devices are a family of simple, low pin-count PLDs and zero power devices that can replace PAL/GAL devices with more logic and speeds as fast as 5ns. PEEL Arrays are complex PLDs with advanced architectural features. ICT will continue to support and manufacture PEEL Devices, PEEL Arrays and the company’s new zero power technologies. The company has historically secured foundry capacity from Chartered and has shifted production to UMC to reduce cost.

ICT’s future plans are focused on IP Core and Compiler technologies for the Internet Appliance market. The company is working with several major companies in Asia-Pacific and the U.S. to improve the design cycle and IP reuse for Internet Appliances. ICT believes the crushing time-to-market speeds required in the Internet Appliance market will drive the need for reconfigurable SOCs. The company is already doing a brisk business in the MP3 market with off-the-shelf PEEL Devices due to time-to-market issues.

While most vendors target re-configurable logic IP at high-end applications like software defined radios and packet processing, ICT is addressing the need to maintain design flexibility and offer design fixes late in the product cycle. For high volume, fast time-to-market Internet Appliance SOCs, ICT believes this strategy will take the risk out of SOC development.

ICT is shipping an embedded EEPROM core and will soon ship an Embedded Non-Volatile EEPROM Compiler, which has already been licensed to UMC. The NVM EEPROM compiler will compile arrays from 128 Bits to 64K Bits in word widths from 4 to 128 Bits in 4 bits increments. ICT has developed a 2K x 8 EEPROM memory block as a design verification vehicle. The device has access times up to 100ns, byte write up to 1mS, low voltage, high endurance (>100K cycles) and data retention up to 10 years.

The EEPROM compiler will be supported by UMC in a .35u 2P3M logic process. According to ICT, its EEPROM technology is ideal because it is logic process compatible, simpler than Flash, and has good data retention and endurance. Most applications also require less than 1KByte on memory. ICT claims that the simple mask process with fewer layers than competitors’ makes its technology portable and easily integrated with standard logic processes.

ICT also plans to ship an Embedded Programmable Logic Compiler by year-end. Its embedded Programmability-On-Chip (POC) technology and IP provide re-configurable logic capability to SOCs to enable feature differentiation, flexible interfacing, and repair. As the first step, the PEEL Array PA9040 is currently offered as an embedded-core. The SCORE, (Scalable On-Chip Re-Programmable Logic Engine) compiler, developed in conjunction with several EDA and semiconductor partners, will be available by year-end. SCORE allows easy product differentiation and product upgradeability while reducing the time-to-market and risk of SOC design. SCORE features deterministic timing, efficient modular array sizes, re-configurable sockets, and simple configuration software.

ICT has a licensing and joint development agreement with Huayan Microelectronics for E2PROM, CPU, and other IP cores; with the Shanghai Belling Corp. for EEPROM IP Cores; and with Applied Component Technology for 512 x 8 serial EEPROM. The company has other unannounced licensees as well.

Web Chang, CEO and chairman (formerly VP of engineering for ICT)
Volker Cathrein, president and CFO (formerly CFO of ICT)
Bob Lewis, VP of Sales
Mark Scheitrum, VP of Marketing
Peter Yin, VP of Engineering
Zimmer Jan, VP of Technology Development




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